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[chassis][voq] 400g to100g speed changes for chassis linecards #13935
[chassis][voq] 400g to100g speed changes for chassis linecards #13935
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Signed-off-by: Arvindsrinivasan Lakshmi Narasimhan <arlakshm@microsoft.com>
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@arlakshm approved with comments if you an address
@kenneth-arista , @kartik-arista , @abohanyang , @mlok-nokia @sanmalho-git for viz... |
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LGTM
cc @anamehra for review |
added one comment, |
Thanks for tagging @abdosi ! |
Signed-off-by: Arvindsrinivasan Lakshmi Narasimhan <arlakshm@microsoft.com>
Does this support the speed change only via minigraph or CLI as well? |
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@arlakshm @abdosi please note that in future when we use 100G PAM4 serdes this change won't be able to handle 400G speed(4 lanes) to 100G speed(1 lane). There is an inherent assumption here that 400G speed will always have 8 lanes and 100G will always have 4 lanes. Can we think of a better generic solution? This solution looks only specific to a particular platform and won't stand future platforms that are going to be based on 100G PAM4.
Excellent point. I understand some vendors have started to use this but I would suggest we take on this 100G PAM4 serdes as a phase 2 change. Also, the adaptation to this new optic which inherently has "higher" chance of noise can causing bad data at corrupting 2 bits at the same time may require additional time to see if it will be "widely" adopted by the community... |
@prgeor, as discussed offline, the scope of change to solve a specific use case: Support changing speed from 400g to 100g for voq linecards. These platforms today have 400g port with 8 serdes lines, and 100g will operate with 4 serdes lane. |
The current use case is to support this speed change via minigraph |
@gechiang, yes, The current PR is not intended for all the platforms. We can enhance this change on other platforms, based testing and other use-cases which might arise in the future. |
@lguohan please help merge |
@gechiang not just that, we dont have means in minigraph to know whether the 100G speed is from 2x100G, 4x100G or 8x100G. We can come back later |
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LGTM for current usecase
@prgeor , we should test this and see if pizza box works with this lane selection. |
the pr looks good, however, description is a little bit concise/brief. i suggest to pull some of the discussions into the pr description and give people a full story. for example, there is some limitation of this pr, like 2x50PAM 100g mode is not supported. |
@lguohan updated the description. |
…-net#13935) On SONiC VoQ chassis, the speed changes are done from 400G to 100G needs to be supported on 400G linecards. To enable this, along with speed change the port lanes need to be changed. This PR has the changes to update the port lanes when such speed change happens. This PR is intended only for VoQ chassis linecards. These platforms today have 400g port with 8 serdes lines, and 100g will operate with 4 serdes lane. When the port speed changes from 400G to 100G the first 4 lanes will be used for 100G port. Platforms which support 2x50g PAM4 or support 100G PAM4 serdes or other combinations are not handled in the PR. Signed-off-by: Arvindsrinivasan Lakshmi Narasimhan <arlakshm@microsoft.com>
Cherry-pick PR to 202205: #13982 |
@arlakshm - was this tested against a multi-asic linecard? |
@sanmalho-git, yes I am testing on a multi asic linecard |
@arlakshm - thanks - please let us know once you are done with testing, and I can try it out on our cards as well. As is, it is failing on multi-asic cards. |
…-net#13935) On SONiC VoQ chassis, the speed changes are done from 400G to 100G needs to be supported on 400G linecards. To enable this, along with speed change the port lanes need to be changed. This PR has the changes to update the port lanes when such speed change happens. This PR is intended only for VoQ chassis linecards. These platforms today have 400g port with 8 serdes lines, and 100g will operate with 4 serdes lane. When the port speed changes from 400G to 100G the first 4 lanes will be used for 100G port. Platforms which support 2x50g PAM4 or support 100G PAM4 serdes or other combinations are not handled in the PR. Signed-off-by: Arvindsrinivasan Lakshmi Narasimhan <arlakshm@microsoft.com>
Cherry-pick PR to 202211: #14322 |
On SONiC VoQ chassis, the speed changes are done from 400G to 100G needs to be supported on 400G linecards. To enable this, along with speed change the port lanes need to be changed. This PR has the changes to update the port lanes when such speed change happens. This PR is intended only for VoQ chassis linecards. These platforms today have 400g port with 8 serdes lines, and 100g will operate with 4 serdes lane. When the port speed changes from 400G to 100G the first 4 lanes will be used for 100G port. Platforms which support 2x50g PAM4 or support 100G PAM4 serdes or other combinations are not handled in the PR. Signed-off-by: Arvindsrinivasan Lakshmi Narasimhan <arlakshm@microsoft.com>
Related work items: sonic-net#276, sonic-net#305, sonic-net#332, sonic-net#338, sonic-net#339, sonic-net#1188, sonic-net#1192, sonic-net#1197, sonic-net#1206, sonic-net#1685, sonic-net#1690, sonic-net#1696, sonic-net#1699, sonic-net#1709, sonic-net#1727, sonic-net#1737, sonic-net#1741, sonic-net#1742, sonic-net#2511, sonic-net#2512, sonic-net#2532, sonic-net#2559, sonic-net#2626, sonic-net#2638, sonic-net#2645, sonic-net#2649, sonic-net#2660, sonic-net#2669, sonic-net#2670, sonic-net#2678, sonic-net#10084, sonic-net#11442, sonic-net#11873, sonic-net#12047, sonic-net#12110, sonic-net#12207, sonic-net#12529, sonic-net#12678, sonic-net#13235, sonic-net#13287, sonic-net#13372, sonic-net#13395, sonic-net#13456, sonic-net#13497, sonic-net#13522, sonic-net#13545, sonic-net#13547, sonic-net#13552, sonic-net#13569, sonic-net#13572, sonic-net#13578, sonic-net#13591, sonic-net#13611, sonic-net#13647, sonic-net#13649, sonic-net#13660, sonic-net#13710, sonic-net#13716, sonic-net#13724, sonic-net#13726, sonic-net#13732, sonic-net#13735, sonic-net#13739, sonic-net#13757, sonic-net#13786, sonic-net#13792, sonic-net#13800, sonic-net#13801, sonic-net#13802, sonic-net#13805, sonic-net#13806, sonic-net#13812, sonic-net#13814, sonic-net#13822, sonic-net#13831, sonic-net#13834, sonic-net#13847, sonic-net#13870, sonic-net#13882, sonic-net#13884, sonic-net#13885, sonic-net#13894, sonic-net#13895, sonic-net#13926, sonic-net#13932, sonic-net#13935, sonic-net#13942, sonic-net#13951, sonic-net#13953, sonic-net#13964
Why I did it
On SONiC VoQ chassis, the speed changes are done from 400G to 100G needs to be supported on 400G linecards.
To enable this, along with speed change the port lanes need to be changed. This PR has the changes to update the port lanes when such speed change happens.
This PR is intended only for VoQ chassis linecards. These platforms today have 400g port with 8 serdes lines, and 100g will operate with 4 serdes lane. When the port speed changes from 400G to 100G the first 4 lanes will be used for 100G port.
Platforms which support 2x50g PAM4 or support 100G PAM4 serdes or other combinations are not handled in the PR.
How I did it
Updated the port lanes when the port speed is changed from 400g to 100g.
How to verify it
UT and test on sonic chassis
Which release branch to backport (provide reason below if selected)
Description for the changelog
Ensure to add label/tag for the feature raised. example - PR#2174 under sonic-utilities repo. where, Generic Config and Update feature has been labelled as GCU.
Link to config_db schema for YANG module changes
A picture of a cute animal (not mandatory but encouraged)